JPH055137B2 - - Google Patents

Info

Publication number
JPH055137B2
JPH055137B2 JP58185830A JP18583083A JPH055137B2 JP H055137 B2 JPH055137 B2 JP H055137B2 JP 58185830 A JP58185830 A JP 58185830A JP 18583083 A JP18583083 A JP 18583083A JP H055137 B2 JPH055137 B2 JP H055137B2
Authority
JP
Japan
Prior art keywords
memory
data
address
cache memory
accessed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58185830A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6079446A (ja
Inventor
Hidekazu Matsumoto
Tadaaki Bando
Shinichiro Yamaguchi
Takeshi Kato
Kenji Hirose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Industry and Control Solutions Co Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP58185830A priority Critical patent/JPS6079446A/ja
Publication of JPS6079446A publication Critical patent/JPS6079446A/ja
Publication of JPH055137B2 publication Critical patent/JPH055137B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP58185830A 1983-10-06 1983-10-06 多重仮想記憶デ−タ処理装置 Granted JPS6079446A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58185830A JPS6079446A (ja) 1983-10-06 1983-10-06 多重仮想記憶デ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58185830A JPS6079446A (ja) 1983-10-06 1983-10-06 多重仮想記憶デ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS6079446A JPS6079446A (ja) 1985-05-07
JPH055137B2 true JPH055137B2 (en]) 1993-01-21

Family

ID=16177617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58185830A Granted JPS6079446A (ja) 1983-10-06 1983-10-06 多重仮想記憶デ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS6079446A (en])

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0534042Y2 (en]) * 1986-07-08 1993-08-30
JPH0221342A (ja) * 1987-02-27 1990-01-24 Hitachi Ltd マルチプロセッサシステム及びマルチプロセッサシステムにおける論理キャッシュメモリのアクセス方法
JPS6488672A (en) * 1987-09-29 1989-04-03 Nec Corp Multiprocessor system
JP2573255B2 (ja) * 1987-09-30 1997-01-22 株式会社東芝 データキャッシュ制御方式
JPH06282488A (ja) 1993-03-25 1994-10-07 Mitsubishi Electric Corp キャッシュ記憶装置
JP4226816B2 (ja) 2001-09-28 2009-02-18 株式会社東芝 マイクロプロセッサ
JP4643702B2 (ja) * 2008-10-27 2011-03-02 株式会社東芝 マイクロプロセッサ

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864688A (ja) * 1981-10-14 1983-04-18 Hitachi Ltd デ−タ処理装置
US4463420A (en) * 1982-02-23 1984-07-31 International Business Machines Corporation Multiprocessor cache replacement under task control

Also Published As

Publication number Publication date
JPS6079446A (ja) 1985-05-07

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